1. Field of the Invention
The present invention relates generally to a high efficiency power amplifier. More specifically, the invention relates to a high efficiency power amplifier to be employed in a high frequency band for performing F-class operation.
2. Description of the Related Art
In this type of F-class high efficiency power amplifier, it is required to provide an impedance matching circuit so that load impedance of a transistor, such as a field-effect transistor (FET) as an active element for amplification, matches with a fundamental wave, becomes zero (short) with respect to a second high harmonic wave and becomes infinite (open) with respect to a third high harmonic wave.
Here, it should be noted that "F-class operation" means that, in a high frequency amplifier and so forth, a pulse form wave is generated at the output side utilizing high harmonic components (harmonic tuning) and high efficiency operation is thus performed. In this case, a bias for an amplifier active element is set to be the B-class bias.
As examples of the F-class power amplifiers of this type, there are amplifiers disclosed in "IEEE Transactions on Electron Devices" vol. 14, No. 12, pp 851 to 857, Japanese Unexamined Patent Publication (Kokai) No. Showa 63-204912, and Japanese Unexamined Patent Publication No. Showa 64-74813.
FIG. 12 shows an example of such F-class power amplifier. As shown in FIG. 12, the amplifier comprises a FET 1 as the amplifier active element, a coupling capacitor 2 for blocking a direct current, an RF current- blocking inductor 3 charging a direct current bias V.sub.D to the drain of FET 1, loads 4 to 6 for the FET 1 and a bias circuit 10 for providing the B-class bias for the FET 1.
The load includes resonance circuit 4 for providing a predetermined impedance (matching impedance) Z.sub.1 for a fundamental wave, a resonance circuit 5 for providing zero impedance for even harmonics and a resonance circuit 6 providing infinite impedance for odd harmonics.
FET 1 is charged a direct current voltage V.sub.D via the inductor 3 at the drain electrode D thereof and a bias voltage V.sub.GS at the gate electrode G from the bias circuit 10 so that a drain current i.sub.D may flow for a half period of an input sine wave, as shown in FIG. 13A.
It is assumed that the peak value of the drain current i.sub.D is I.sub.p, the fourth or higher degree of high harmonic components of the drain current i.sub.D can be ignored, and the internal resistance of the FET 1 is sufficiently small.
Under the condition set forth above, the load impedance to maximize a drain efficiency .eta..sub.D can be expressed as: EQU Z1=4V.sub.D /(3.sup.1/2 IP) (fundamental frequency wave impedance) EQU Z2=0 (second high harmonic wave impedance) EQU Z3=.infin.(third high harmonic wave impedance).
The drain efficiency then becomes EQU .eta..sub.D =.pi./(2.cndot.3.sup.1/2).
The amplitude of fundamental wave voltage V.sub.1 of an amplifier output is: EQU V.sub.1 =2V.sub.D /3.sup.1/2
and thus becomes greater than the direct current bias voltage V.sub.D. However, since the FET 1 is maintained in conductive state during a period where the output fundamental wave voltage v.sub.D is negative, the instantaneous value of the drain voltage v.sub.D becomes the waveform as illustrated by dotted line in FIG. 13B. In the range (shown as a period T) where the phase .theta. of the fundamental wave is EQU .pi./3.ltoreq..theta..ltoreq.2.pi./3,
v.sub.D is maintained substantially zero.
Namely, the absolute value of the sum of the all high frequency instantaneous voltages generated at the load is restricted to the direct current bias voltage V.sub.D.
In the conventional F-class amplifier, it can be considered that the drain current is obtained in a waveform of FIG. 13A irrespective of the drain voltage. However, in the microwave band FET as put into practical use, the drain voltage versus drain current characteristics, taking the gate voltage V.sub.GS as parameter, becomes as illustrated in FIG. 14, in which the drain current depends on the drain voltage in a range where the drain voltage is lower than or equal to a knee voltage, i.e. saturation voltage V.sub.S.
Accordingly, in the range where the drain voltage v.sub.D is less than saturation voltage and close to zero volt, the drain current waveform does not become half sine waveform as illustrated in FIG. 13A, but becomes a double hump waveform (a waveform having two peaks (humps) such as the peak portion of the waveform illustrated in FIG. 13B) of waveform at the peak portion to cause distortion of the drain current waveform.
Due to distortion of the drain current, the fundamental wave component in the drain current is reduced and other high harmonic components may also be varied so that an ideal harmonic tuning amplifier can not be realized and thus the degradation of efficiency results.